Interfaces for Control Components – Rajeev Alur

      No Comments on Interfaces for Control Components – Rajeev Alur

Modern software engineering heavily relies on clearly specified
interfaces for separation of concerns among designers implementing
components and programmers using those components. The need for
interfaces is evident for assembling complex systems from components,
but more so in control applications where the components are designed
by control engineers using mathematical modeling tools and used by
software executing on digital computers. However, the notion of an
interface for a control component must incorporate some information
about timing, and standard programming languages do not provide a way
of capturing such resource requirements. This talk will describe how
finite automata over infinite words can be used to define interfaces
for control components. When the resource is allocated in a
time-triggered manner, the allocation from the perspective of an
individual component can be described by an infinite word over a
suitably chosen alphabet. The control engineer can express the
interface of the component as an omega-regular language that contains
all schedules that meet performance requirement. The software must
ensure, then, that the runtime allocation is in this language. The
main benefit of this approach is composability: conjoining
specifications of two components corresponds to a simple
language-theoretic operation on interfaces. We have demonstrated how
to automatically compute automata for performance requirements such as
exponential stability and settling time for the LQG control designs.
The framework is supported by a toolkit, RTComposer, that is
implemented on top of Real Time Java. The benefits of the approach
will be demonstrated using applications to wireless sensor/actuator
networks based on the WirelessHART protocol and to distributed control
systems based on the Control Area Network (CAN) bus.

Rajeev Alur is Zisman Family Professor of Computer and Information
Science at University of Pennsylvania. He obtained his bachelor’s
degree in computer science from Indian Institute of Technology at
Kanpur in 1987, and PhD in computer science from Stanford University
in 1991. Before joining Penn in 1997, he was with Computing Science
Research Center in Bell Laboratories. His areas of research include
formal modeling and analysis of reactive systems, hybrid systems,
model checking, software verification, logics and automata, and design
automation for embedded software. His awards include IEEE Logic in
Computer Science (LICS) Test-of-Time award (2010), the inaugural CAV
(Computer-Aided Verification) award (2008), ACM Fellow (2007), IEEE
Fellow (2007), designation as a highly cited scientist by the
Institute for Scientific Information (2005), Alfred P. Sloan Faculty
Fellowship (1999), National Science Foundation’s CAREER award (1997),
and President of India’s Gold Medal for academic excellence (1987).
Prof. Alur has (co)chaired scientific meetings such as CAV (Intl Conf
on Computer-Aided Verification), EMSOFT (ACM Symp on Embedded
Software), HSCC (Intl Conf on Hybrid Systems: Computation and
Control), and LICS (IEEE Symp on Logic in Computer Science). He has
served as the chair of ACM SIGBED (Special Interest Group on Embedded
Systems), and is currently the general chair of IEEE LICS.

Leave a Reply

Your email address will not be published. Required fields are marked *